Integrated circuits may include more than one million micro-electronic field effect transistors that are formed on a substrate and cooperate to perform various functions within the circuit. Reliably producing sub-half micron and smaller features is one of the key technologies for the next generation of very-large-scale integration (“VLSI”) and ultra-large-scale integration (“ULSI”) of semiconductor devices. However, as the limits of integrated circuit technology are pushed and extended vertically, the shrinking dimensions of interconnects in VLSI and ULSI technology have placed additional demands on processing capabilities. Reliable formation of the vias and interconnects is important to integrated circuit success and to the continued effort to increase circuit density and quality of individual substrates and die.
As feature sizes have reduced, so have the interconnects and vias electrically connecting the various structures. However, safety features included with interconnects and vias may cause steep increases in line resistance and resistive-capacitive delay throughout the circuit structure. Additionally, electromigration can become increasingly destructive as feature sizes shrink.
Thus, there is a need for improved systems and methods that can be used to produce high quality devices and structures. These and other needs are addressed by the present technology.